ASML and TSMC launch 12-inch photomask initiative for High NA EUV

The two semiconductor giants are targeting a 12-inch mask pilot line by 2031, with full High NA EUV production readiness set for 2033.

A silicon wafer displaying intricate multicolored circuitry patterns sits on a rotating stage, being inspected by a precision probe in a brightly lit laboratory.

ASML and TSMC have announced a joint industry initiative to accelerate the transition from the current 6-inch photomasks to larger 12-inch formats for use with High NA Extreme Ultraviolet (EUV) lithography systems. The collaboration, formalised on 7 September 2026 ahead of the SPIE BACUS Conference in Monterey, California, targets a 12-inch mask pilot line by 2031 and full lithography system readiness for advanced node production by 2033.

TSMC intends to begin high-volume manufacturing using ASML's High NA EUV technology at advanced nodes from 2030, initially with existing 6-inch masks. The companies argue that the later shift to 12-inch masks will deliver a further step-change: higher scanner throughput, lower per-chip cost, and the elimination of stitching constraints that arise when exposing large die on smaller reticles. Both companies framed the move as essential to meeting demand for chips that are smaller, faster and more energy-efficient, with AI workloads specifically cited as a driver of increasingly complex transistor architectures.

The case for larger reticles

The photomask is a foundational element of the lithography process: a precision glass plate carrying the circuit pattern that the scanner projects onto the silicon wafer. High NA EUV, the next generation of ASML's flagship lithography platform, delivers higher numerical aperture and therefore finer resolution, but at the cost of a smaller exposure field per shot. Moving to a 12-inch mask format would restore and extend that field, enabling chipmakers to pattern larger or more complex regions in fewer exposures and improving overall fab economics.

ASML chief executive Christophe Fouquet said the company expects High NA EUV adoption to increase progressively along the device scaling roadmap. TSMC chairman and CEO C.C. Wei emphasised the value of collective action across the supply chain, noting that complex industry transitions are best solved when multiple participants share the development burden and the eventual benefits.

Market and competitive context

ASML holds an effective monopoly on EUV lithography systems globally, a position reinforced by the capital intensity and multi-decade intellectual property depth required to develop the technology. High NA EUV represents the successor to the Low NA systems now in volume production at TSMC, Samsung and Intel Foundry. Of those three, TSMC has been most explicit about its High NA production timeline, and this initiative further cements its role as lead development partner for ASML's roadmap.

The 12-inch photomask transition will require parallel investment from mask blank suppliers, pellicle manufacturers and inspection-tool vendors. The release notes that major ecosystem partners attended the September announcement and expressed interest in joining the initiative, though no specific companies were named. This points to a multi-year standards and infrastructure programme analogous in scope to prior industry-wide reticle format transitions.

From a geopolitical standpoint, the collaboration between a Dutch equipment maker and a Taiwanese foundry carries relevance beyond pure engineering. ASML's EUV and High NA EUV systems remain subject to Dutch and US export controls that restrict their sale to China. Any expansion of the High NA ecosystem effectively deepens the technology gap between leading-edge fabs operating in allied nations and those without access to EUV tooling.

Road ahead

The 2031 pilot line target leaves a seven-year development window, during which mask infrastructure, blank suppliers and inspection equipment all need to be qualified at the new format. Should the timeline hold, 12-inch High NA EUV would become available just as the semiconductor industry is expected to be producing chips at gate-all-around transistor generations well beyond today's leading nodes.

Investors and supply-chain participants will be watching for the formal announcement of additional initiative members, which will serve as the clearest signal of how broadly the industry has committed to this transition path.